The basic purpose of packaging electronic components is to protect the components while at the same time providing electrical interconnections from the components through the package. Manufacturability and protection are key concerns. Due to ongoing market demand, electronic packages are continuously being driven toward smaller sizes and reduced footprints while still being environmentally robust. Even though these electronic packages are miniaturized they are still highly functional.
Miniaturization for active components may be achieved through the use of a semiconductor die with as little packaging as possible. One approach for miniaturization is based on a packaged surface mount device which includes a protective structure. Environmental protection from moisture and dust is one potential benefit when using this protective structure approach, even though the protective structure enclosing the semiconductor die may have a relatively high thickness (up to 1-2 mm) above the printed wiring board (PWB). A packaged surface mount device also allows an air gap or air bridge to exist between the semiconductor die and the package, which may be helpful when the semiconductor die is a radio frequency (RF) integrated circuit. The width of the protective structure for the packaged surface mount device may be upwards of 2× the footprint of the actual semiconductor die, for example.
For the same semiconductor die used in the packaged surface mount device, miniaturization may be further achieved using a packaged chip-on-board approach. The semiconductor die in the packaged chip-on-board approach is mechanically secured directly to the PWB with an adhesive and electrically interconnected via wire-bond connections. Instead of the protective structure, environmental protection is achieved by placing an epoxy glob over the semiconductor die. A width of a packaged chip-on-board setup may be upwards of 1.5× the footprint of the actual semiconductor die, for example. Yet a further reduction may be achieved when the semiconductor die is mounted to the PWB via flip-chip connections. Here, a width of the flip-chip approach may be between 1× to 1.25× the footprint of the bare die depending on the underfill fillet size.
Consequently, tradeoffs exist between providing environmental robustness and usability of the semiconductor die, particularly when placed in a mobile electronic device, for example. Component lid technologies can be used to provide environmental robustness for a semiconductor die. However, the resulting lids may be relatively thick due to molding technologies currently available, and the sealing methods are moderately inconvenient since they use relatively long epoxy cure times. An alternative to injection molding is to use a lid comprising a liquid crystal polymer (LCP) material. LCP materials have very low moisture permeability and can provide a near-hermetic seal while maintaining a thin profile.
An LCP lid for protecting a semiconductor die is disclosed in the article titled “Packaging of MMICs in Multilayer LCP Substrates” by Thompson et al. As illustrated in FIG. 1, the electronic package 10 includes a multilayered LCP lid 12 placed over an active semiconductor die 14 embedded within a cavity 15. The illustrated LCP lid 12 is about 10 mils thick and has a significantly lower profile as compared to an injection molded lid. The LCP lid 12 is laminated with the underlying layers 16, 17, 18, 19 which are also an LCP material. As discussed in the article, low melting temperature LCP layers (285° C.) are used to adhere generally thicker higher melting temperature core layers (315° C.) to create a homogeneous LCP electronic package. Nonetheless, there is still a need to improve upon component lid technologies for protecting semiconductor dies.